Dimitrakopoulos Georgios

RANK:Associate Professor
SECTOR:Electronics and Information Technology Systems Sector
LABORATORY:Integrated Circuits Laboratory
EXPERTISE:Digital Integrated Circuits Design

 

CONTACT DETAILS

ADDRESS:University Campus Kimmeria, Building B, Office 1.11
E-MAIL:dimitrak@ee.duth.gr
TELEPHONE:+30 25410 79543, Fax: +30 25410 79545
PERSONAL WEBSITE:http://utopia.duth.gr/~dimitrak
CV:

 

SCIENTIFIC INTERESTS

  • System on Chip Design
  • Electronic Design Automation
  • Computer Architecture
  • Low Power Integrated Circuits

 

UNDERGRADUATE COURSES

  • Integrated Circuits
  • VLSI systems
  • Microelectronics

 

POSTGRADUATE COURSES

  • System on Chip

 

SHORT CV

Giorgos Dimitrakopoulos received the Diploma in Computer Engineering from the Computer Engineering and Informatics Dept. of the University of Patras in 2001. In 2003 he completed the MSc in “Hardware- Software Integrated Systems” and in 2007 he earned the PhD from the same department. Between 2008 and 2010 he worked as a Postdoctoral fellow at the Computer architecture and VLSI Systems Lab of the Institute of Computer Science (ICS) of the Foundation for Research and Technology Hellas (FORTH) and at the University of Crete. Later on, he was appointed as a Lecturer to the Informatics and Communication Engineering Department, of the University of West Macedonia, Kozani, Greece. Since January 2012, he is a faculty member of the Electrical and Computer Engineering Dept. of the Democritus University of Thrace, Xanthi, Greece. His research interests lie in the broad areas of digital integrated circuits, electronic design automation and computer architecture.

 

RESEARCH PROJECTS

  • Research grant from Mentor Graphics, a Siemens Business, Catapult Divison, for “High Level Synthesis for Systems on Chip”, Jan 2019 – Dec. 2023. – PI
  • Network-on-Chip Design in PAVET 2013: Multicore and Multithreaded Graphics Processingn Units for 3D graphics in embedded systems”, ThinkSilicon, Patras (1/4/2014-30/4/2015) – PI

 

SELECTED PUBLICATIONS

  1. Mangiras, A. Stefanidis, I. Seitanidis, C. Nicopoulos, G. Dimitrakopoulos “Timing-Driven Placement Optimization Facilitated by Timing-Compatibility Flip-Flop Clustering” , to appear in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2019.
  2. Konstantinou, A. Psarras, C. Nicopoulos, G. Dimitrakopoulos “The Mesochronous Dual-Clock FIFO Buffer” , in IEEE Transactions on VLSI Systems, vol. 28, no. 1, pp. 302-306, Jan. 2020
  3. Seitanidis, G. Dimitrakopoulos, P. Mattheakis, L. Masse-Navette, D. Chinnery, “Timing-Driven and Placement-Aware Multi-Bit Register Composition” , in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 38, no. 8., pp. 1501-1514, Aug., 2019.
  4. Seitanidis, C. Nicopoulos, G. Dimitrakopoulos, “Automatic Generation of Peak-Power Traffic for Networks-on-Chip” , in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 38, no.1, pp. 96-108, Jan., 2019. paper
  5. Patsidis, D. Konstantinou, C. Nicopoulos, G. Dimitrakopoulos, “A Low-Cost Synthesizable RISC-V Dual-Issue Processor Core Leveraging the Compressed Instruction Set Extension” , in Microprocessors and Microsystems, Elsevier, Sept. 2018.
  6. Psarras, S. Moisidis, C. Nicopoulos, G. Dimitrakopoulos, “Networks-on-Chip with Double-Data-Rate Links” , in IEEE Transactions on Circuits and Systems I, vol. 64, no. 12, pp. 3103-3114, Dec. 2017.
  7. Psarras, M. Paschou, C. Nicopoulos, G. Dimitrakopoulos, “A Dual-Clock Multiple-Queue Shared Buffer”, in IEEE Transactions on Computers, vol. 66, no. 10, pp. 1809 – 1815, Oct. 2017.

 

GOOGLE SCHOLAR LINK

https://scholar.google.com/citations?hl=en&user=xg-t3RgAAAAJ

 

SCOPUS LINK

https://www.scopus.com/authid/detail.uri?authorId=56252345700

 

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